Performance Impact of Formulating Computations in SYCL* on CPUs and GPUs
This talk explores the different ways you can formulate structured mesh stencil computations and unstructured mesh computations in SYCL*. Learn about multidimensional parallel_for computations with or without nd_range, and different ways of avoiding race conflicts in unstructured meshes (atomics and two ways of coloring). These formulations are briefly contrasted to other parallelization approaches (OpenMP* and CUDA*).
The speakers evaluate a range of modern parallel architectures from Intel, AMD* and NVIDIA*–including CPUs and GPUs–using the Intel® oneAPI DPC++ Compiler, and hipSYCL (also known as Open SYCL).
Speaker
Istvan Zoltan Reguly got his master of science degree and his PhD in computer science from Pázmány Péter Catholic University Information Technology (PPCU ITK). He leads the high-performance computing (HPC) lab at PPCU ITK, where they research the design and implementation of domain specific languages for HPC.
Product and Performance Information
Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex.