There is a need to accelerate graph processing through specialized techniques and hardware in order to improve analytical throughput due to ever increasing data sizes. The Intel® FPGA Add-on for oneAPI Base Toolkit is used to create minimum-spanning-tree (MST) and breadth-first search (BFS) accelerators. 

Results showcase BFS performance up to 75 million traversed edges per second, achieving up to 3.0x speedup over the Intel® Xeon® 6128 CPU baseline. Despite falling short of related hardware description language (HDL) designs, this research uses 5.85x fewer lines of code. MST designs display speedups of approximately 1.5x when compared to the CPU baseline.

Speaker

James Bickerstaff received his bachelor of science in computer engineering from the University of Pittsburgh and is now a second year PhD student. He is a member of the National Science Foundation (NSF) Center for Space, High-performance, and Resilient Computing (SHREC) research lab. His primary research focus is accelerating high-throughput applications using FPGAs with oneAPI.