Essentials of SYCL*
Learn the fundamentals of this language designed for data parallel and heterogeneous computing through hands-on practice in this guided learning path.
Overview
SYCL* provides a consistent programming language across CPU, GPU, FPGA, and AI accelerators in a heterogeneous framework where each architecture can be programmed and used either in isolation or together.
The language and API extensions in SYCL enable different development use cases, including development of new offload acceleration or heterogeneous compute applications, conversion of existing C or C++ code to code that's compatible with SYCL, and migrating from other accelerator languages or frameworks.
Use this learning path to get hands-on practice with the essentials of SYCL using a Jupyter* Notebook on Intel® Developer Cloud.
Objectives
Who is this for?
Developers who want to learn the basics of SYCL for heterogeneous computing (CPU, GPU, FPGA, and AI accelerators).
What will I be able to do?
Practice the essential concepts and features of SYCL with live sample code on Intel Developer Cloud.
Start Learning SYCL
Get hands-on practice with code samples in a Jupyter Notebook running live on Intel Developer Cloud.
For FPGA and PRC-based Developers
To get started:
- Sign in to Intel Developer Cloud, select One Click Log In for JupyterLab, and then select Launch Server (if needed).
- Open the oneAPI_Essentials folder, and then select 00_Introduction_to_Jupyter to open the folder.
- Select Introduction_to_Jupyter.ipynb.
- If you already have an Intel Developer Cloud account, it may be necessary to update oneAPI_Essentials. To do this, scroll to the bottom of Introduction_to_Jupyter.ipynb and execute the last code cell.
- Refresh your browser.
Modules
Introduction to JupyterLab* and a Jupyter* Notebook
Use a Jupyter Notebook to modify and run code as part of learning exercises.
To begin, open Introduction_to_Jupyter.ipnyb.
Introduction to SYCL
- Articulate how oneAPI can help to solve the challenges of programming in a heterogeneous world.
- Use oneAPI solutions to enable your workflows.
- Understand SYCL standards and features.
- Become familiar with using Jupyter Notebooks for training throughout the course.
Program Structure
- Articulate the SYCL fundamental classes.
- Use device selection to offload kernel workloads.
- Decide when to use basic parallel kernels and ND Range Kernels.
- Create a host accessor.
- Build a sample SYCL application through hands-on lab exercises.
Unified Shared Memory
- Use new SYCL features like Unified Shared Memory (USM) to simplify programming.
- Understand implicit and explicit ways of moving memory using USM.
- Solve data dependency between kernel tasks in an optimal way.
Sub-Groups
- Understand advantages of using Sub-groups in SYCL.
- Take advantage of Sub-group collectives in ND-Range kernel implementation.
- Use Sub-group Shuffle operations to avoid explicit memory operations.
Demonstration of Intel® Advisor
- See how Offload Advisor¹ identifies and ranks parallelization opportunities for offload.
- Run Offload Advisor using command line syntax.
- Use performance models and analyze generated reports.
¹Offload Advisor is a feature of Intel® Advisor installed as part of the Intel® oneAPI Base Toolkit (Base Kit).
Intel® VTune™ Profiler on Intel® Developer Cloud
- Profile a DPC++ application using Intel® VTune™ Profiler on Intel Developer Cloud.
- Understand the basics of command line options in Intel VTune Profiler to collect data and generate reports.
Introduction to oneDPL: A Set of oneDPC++ Libraries
- Simplify SYCL programming using Intel® oneAPI DPC++ Library (oneDPL).
- Use SYCL Library algorithms for heterogeneous computing.
- Implement oneDPL algorithms using buffers and unified shared memory.
Reductions in SYCL
- Understand how reductions can be performed with parallel kernels.
- Take advantage of the reduce function to do reductions at the sub_group and work_group level.
- Use the SYCL reduction extension to simplify reduction with parallel kernels.
Explore Buffers and Accessors in Depth
- Explain Buffers and Accessors in depth.
- Understand the Sub buffers and how to create and use Sub buffers
- Explain buffers properties and when to use host_ptr, set_final_data, and set_write_data
- Explain Accessors and the modes of accessor creation
- Explain host accessors and the different use cases of host accessors
Migrate from CUDA* to C++ with SYCL
C++ and SYCL deliver a unified programming model, performance portability, and C++ alignment for applications using accelerators. Learn how to migrate your code to SYCL and see examples from other developers.