Optimize Your Design with LPDDR5 memory using the Agilex™ 5 FPGA D-Series Demo Video

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Agilex™ 5 FPGA D-Series and E-Series Agilex™ 5 FPGA Demo Videos Agilex™ 5 FPGA and SoC FPGA D-Series Support

834968
2024-10-02
Public

Description

Learn about new External Memory Interfaces (EMIF) IP, configure the LPDDR5 EMIF IP and advanced parameters, and then generate an example design on Agilex™ 5 FPGA D-Series devices.

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