Arria® V Timing Optimization Guidelines

Download

In Collections:

FPGA Documentation Index Arria® V FPGAs and SoC FPGAs Support Arria® V FPGAs and SoC FPGAs Support

ID 654468

Date 2011-11-02

Version

Public

Description

This document presents timing optimization guidelines for a set of identified critical timing path scenarios in Arria® V FPGA designs.

Usage instructions