Implementing the 5G Polar Intel® FPGA IP

Description

This video will show the users how to implement the encoding and decoding operation with 5G Polar Intel® FPGA IP. The purpose of this video is to assist users to have quick start with the latest 5G Polar Intel FPGA IP in Intel Stratix® 10 FPGA. This video will also demonstrate to the user on how to perform functional simulation with encoder and decoder. A dummy data is fed into encoder. The output data from the encoder will be converted to LLRs and fed into the decoder to recover back the original data. This video will cover IP configuration, Modelsim* simulation and result analysis for better illustration and to facilitate users' understanding.