q_sys |
|
2014.05.27.18:44:28 | Datasheet |
clk_0 | q_sys |
vj_avalon_master_0 | i2c_cont_bridge_0 | |
avalon_master | avalon_master | |
i2c_cont_bridge_0 | ||
slv | 0x00000000 | |
opencores_i2c_0 | ||
avalon_slave_0 | 0x00000000 | |
System_max_ID_0 | ||
slv | 0x04000000 |
Parameters
|
Software Assignments(none) |
clk_0 | clk | vj_avalon_master_0 | |
clock_sink | |||
clk_reset | |||
clock_sink_reset | |||
avalon_master | i2c_cont_bridge_0 | ||
slv | |||
avalon_master | System_max_ID_0 | ||
slv |
Parameters
|
Software Assignments(none) |
clk_0 | clk_reset | i2c_cont_bridge_0 | |
reset | |||
clk | |||
clock | |||
vj_avalon_master_0 | avalon_master | ||
slv | |||
avalon_master | opencores_i2c_0 | ||
avalon_slave_0 |
Parameters
|
Software Assignments(none) |
i2c_cont_bridge_0 | avalon_master | opencores_i2c_0 |
avalon_slave_0 | ||
clk_0 | clk | |
clock | ||
clk_reset | ||
clock_reset |
Parameters
|
Software Assignments(none) |
clk_0 | clk_reset | System_max_ID_0 |
reset | ||
clk | ||
clock | ||
vj_avalon_master_0 | avalon_master | |
slv |
Parameters
|
Software Assignments(none) |
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