ALTERA DOES NOT WARRANT THAT THE FUNCTIONS CONTAINED IN THIS PATCH 
WILL MEET YOUR REQUIREMENTS, OR THAT THE OPERATION OF THIS PATCH 
WILL BE UNINTERRUPTED OR ERROR-FREE. 

//**************************************************************** 
quartus-10.1-1.38-readme.txt 
Readme file for Quartus II 10.1 SP1 Patch 1.38
Copyright (C) Altera Corporation 2011 All right reserved. 
Patch created on March 31 2011
Patch SPR#: 371800
SPRs fixed: 362066, 365466, 364167
//**************************************************************** 

1)
Problem: Request POF support for Cyclone IV GX EP4CGX75, EP4CGX50 
	 and EP4CGX30A device in both Commercial and Industrial Grade

Solution: This patch provides the POF support for EP4CGX75, EP4CGX50
	  and EP4CGX30A device in both Commercial and Industrial Grade in
	  ACDS10.1sp1 build 197.

	  Please note, you will need the following INI variable(s) to
	  be able to work:

	  dev_password0 = e81f0e65b7331ab9429c7923bba2b4a3d6b85d78a61e66afa97ad8f41640e84b253a01100434235335231223175200520353011632243043265205720010102015516555
	  dev_password1 = e81f0e65b7331ab9429c7923bba2b4a3d6b85d78a61e66afa970c1727740e84b253a01100434235335231223175200520353011632243043265205720001112015516555
	  dev_password2 = e81f0e65b7331ab9429c5c23bba2b4a3d6b85d78a61e66afa97ad8f41640e84b253a01100434235335231223175200520353011632243043265205720010102015516555
	  dev_password3 = e81f0e65b7331ab9429c5c23bba2b4a3d6b85d78a61e66afa970c1727740e84b253a01100434235335231223175200520353011632243043265205720001112015516555
	  dev_password4 = e81f0e65b7331ab9429c3c894c8843892198e2e5f7ee9f755e521afc67e83f4b84208011004342353352312231725211522142056532342043625243520100120105165554
	  dev_password5 = e81f0e65b7331ab9429c3c894c8843892198e2e5f7ee9f755e52bb6401f83f4b84208011004342353352312231725211522142056532342043625243520111130105165554

	  Please put the INI variable statement(s) in quartus.ini, and
	  put quartus.ini into your project directory.

2) 
Problem: Quartus II incorrectly allow CDR clock distribution
	 network to be dynamically reconfigured by channel
	 reconfiguration. This will cause CDR clock input contention at RX in
	 channel 3 or channel 0 after channel reconfiguration if MPLL adjacent
	 to channel 3 or channel 0 is driving other circuitry.

Solution: ALTGX_RECONFIG has been updated to protect CRAM setting that
	  is related to clock distribution network from being dynamically
	  reconfigured to fix this issue. After install the patch,
	  ALTGX_RECONFIG MegaFunction design file is required to be regenerated
	  and perform full compilation on the design. Users may continue to use
	  the HEX / MIF file generated prior to the patch installation. This
	  problem will be fixed in future Quartus II software version.

3) 
Problem: Quartus II does not take into account the RX channel local
	 divider setting in the selection of phase interpolator clock frequency
	 which varies by data rate. This will cause the iCDR to not functioning
	 correctly if a wrong phase interpolator clock frequency is selected.

Solution: This patch will provide the fix to select a correct phase
	  interpolator clock frequency based on the data rate and RX channel
	  local divider setting. This problem will be fixed in future Quartus II
	  software version.


Caution - You must either have previously installed the 
          Quartus II 10.1 SP1 software or must 
          install the Quartus II 10.1 SP1 software 
          before installing this patch. Otherwise, the patch will 
          not be installed correctly and the Quartus II 
          software will not run properly.