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The packaging technology for Intel's forthcoming 45 nanometer (nm) high-k metal gate family of processors uses a copper column “bump” and a tin/silver/copper solder alloy shown here to replace the previously used lead/tin solder alloy to attach the silicon die to the package substrate.
The packaging technology for Intel's forthcoming 45 nanometer (nm) high-k metal gate family of processors uses a copper column “bump” and a tin/silver/copper solder alloy shown here to replace the previously used lead/tin solder alloy to attach the silicon die to the package substrate.
To replace the remaining 5 percent (about .02 grams) of lead/tin solder alloy historically found in the first-level interconnect -- the solder joint that connects the silicon die to the package substrate shown here -- in processor packages, Intel will use a copper column "bump" and a tin/silver/copper solder alloy.
