Intel Developer Forum, Fall 1997

Gordon Moore, Chairman Emeritus, Intel Corporation
San Francisco, Calif., USA
September 30, 1997

Good morning again. I trust yesterday was useful for you, especially considering that we have two more days of it. This morning, we have Gordon Moore to come speak with us, and I've had a lot of questions in the last couple years about how did he come up with this thing called Moore's Law? And I happen to be privy to the insight of how this really happened. You see, Gordon is a deep sea fisherman, he loves to go fishing, and early back in 1965 or so, he was out fishing one day, and he was musing on the fact that he had noticed over the last year or so that he was actually able to get a couple more transistors on that die. And he thought, "Hmm, I wonder how often these things are actually going to double in terms of the number of transistors I can get on the chip."

And he thought, "I know; however many fish I catch today; that's how many years it's going to be." He got 18 fish; it was 18 months. Without further ado, let's bring on Gordon Moore.

(Applause.)

DR. GORDON MOORE: Well, good morning. It's a pleasure to be here, even at this time in the morning.

(Laughter.)

DR. GORDON MOORE: What I'm going to do today is talk a bit about the semiconductor technology that underlies the products that we've all grown to love, hate, or whatever the proper emotion is, depending on how well they're working. I want to try to convey some of the perspective on the semiconductor technology by looking historically at some of the things that have happened and making some projections of where it might go from here.

It really is the driving technology for a bunch of the progress in electronics. Let me look at the semiconductor industry from a couple of points of view. First, the natural one of looking at what has happened financially. You know, this is a growth industry by almost anyone's measure. It is outbound annual growth rate over this 20-year period -- excuse me, 30-year period is about 20 percent. And it hasn't been completely smooth. You see a couple of peaks there. For example, a peak in '84 followed by the dip in '85.

They don't look much plotted on the semi-log paper like this, but going through them, it seems an awful lot more traumatic.

(Laughter.)

DR. GORDON MOORE: In fact, that particular peak-to-valley cost Intel a third of its work force, looking back on it.

While this is a phenomenal record of growth, I look at the number of transistors shipped every year and that's what's interesting to me. {} In the early days, and I first started doing this in the 1970s, I had to take the industry reports of all the products shipped and estimate the number of transistors in each of the circuits, and in some of the microcontrollers and go down almost product by product and add them all up, the last several years, all I have to do to get a reasonable estimate of the number of transistors is count the DRAM bits and multiply by two. It really made this job an awful lot easier.

But this is really spectacular. We're up approaching 10 to the 17th transistors per year. 10 to the 17th is a number that we use quite a bit when we're talking about atoms and things like that. When you're talking about something that's manufactured, a transistor, it takes, I think, a few comparisons to try to put it in perspective.

For example, E.O. Wilson, the famous Harvard biologist who is an expert on ants, estimates that there are 10 to the 16th and 10 to the 17th ants on earth. But if you look at this curve, this year we're making one transistor for every ant.

(Laughter.)

DR. GORDON MOORE: Next year it will be 1.8 transistors per ant since the average growth over here is about 18 percent per year compounded over a 30-year period. In fact, for a period in the '70s when this curve is a little steeper, we were actually going up an order of magnitude about every three years. Tenfold in three years is obviously more than doubling every year.

So every year we were building more electronics than existed in the world on January 1st of that particular year. That is really a growth industry.

Now, you can take these two curves and divide one by the other and you see really one of the driving forces. The average price of the transistor over this time period has dropped almost six orders of magnitude, down to the point where it's only a few micro-bucks today.

To me, this is the key thing that has happened. It's something that is really unprecedented in any manufactured item I could find, that this kind of cost reduction can occur.

And of course it's the reason that electronics have become so cheap that they can be used in a wide variety of applications today that we couldn't even have considered at the time this curve was initially done.

You might ask how can this happen? How can a technology reduce costs this much, and how can this huge increase of the number of transistors used occur. And it takes a couple of things. First of all, it takes a phenomenally elastic market; something that can swallow ten to the eighth times as many transistors over a few decades by the development of new applications, and people figuring out how to use those transistors. And secondly, it takes a unique technology. And I think we have both here. Clearly, the market elasticity was demonstrated by the increase in the number of transistors.

The reason is we have a violation of Murphy's Law that we're exploiting with the technology. By making things smaller, everything gets better simultaneously. We don't even really make a tradeoff. The transistors get faster, the electrons don't have so far to go, the capacitance goes down and one thing and another. Shorter interconnections again speed up the operation of electronics and decrease the power necessary to drive the interconnections. System reliability is increased tremendously because we put a lot more of the system on the chip, which is a controlled environment. And another interesting thing, that over this whole history of the industry, from the single transistors to the devices we've made today, the reliability per packaged semiconductor device, being a 64 megabit DRAM or a single transistor, has remained about constant. So the system reliability has grown tremendously as we've put more and more electronics on a given chip.

We can decrease the power; again, because we get things closer together, make them smaller. But the thing that really drives the industry, in my view, is the fact that we can make things cheaper by putting them on chip.

Now, this has a lot of consequences. What we end up doing is really selling real estate. We've sold area on the silicon wafer for about a billion dollars an acre, that order of magnitude, as long as I've been in the industry. Individual transistors used to sell for a few billion dollars an acre. The microprocessors today, too. Maybe DRAMs are something under a billion. But the real question, then, in what the electronics sell for is what development density we can live with; if we have to have a single transistor on our expensive real estate or if we can develop a lot of electronics.

So if you look at it in a relatively simple-minded manner, you get a pretty good idea of the economics.

Doesn't change an awful lot. What really counts is how much stuff we can pack on that area.

This results in, you know, some rather dramatic changes in economics. The first planar transistors we sold in about 1959, the year the planar transistor was introduced, sold for several dollars. In fact, the first ones we shipped sold for $1.50, I remember very clearly. But a good transistor in those days sold on the order for $5 or $6. Today, you can buy a 16 megabit DRAM for the same $6. That's something over 16 million transistors with all the interconnections and everything else for the price of a single transistor, something less than 30 years ago. This is really pretty dramatic.

And the way this change in the technology gets applied to something like our family of microprocessors is shown on this slide. And you see, there are really two major trends here. First, if you only look at the left entry in each of these several lines, you see as we move down, the chips get bigger. The area actually increases because we're able to make bigger chips as our manufacturing processes are cleaned up. We get our defect densities down and so forth. We get adequate yields with bigger pieces of silicon.

But if you look at the trends horizontally, each of these generations of processors goes through several generations of semiconductor processing and takes advantage of it. For example, if you look at the Pentium® processor line there, you see that that is going through four different generations of technology. A generation of technology typically reduces the minimum feature size by a factor of about .7. So it reduces the area by about .7 squared. So things get smaller, we get more on the wafer. The real estate goes in half. We know what less real estate does to the cost.

But also, we move to a next generation of transistor. The transistors get faster. We can use that additional speed in the decreased area, either to lower the power or to increase the performance or a bit of each.

So a given generation of products, like the Pentium processor, will take advantage of several generations of the processor -- of the process technology to give the lower cost, higher performance, lower power that are important for a variety of the applications.

This is true not only for the processors but it works also for other functions. For example, I looked at some network chips that Intel has made over the years, and as you can see, the early one of these on two micron technology has kind of changed in function but we're going down to the point now where we have full 100 megabit integrated controllers on a single chip, and that will be shrunk to take advantage of the next generation of technology. In fact, it's in the process now.

So there's tremendous leverage by moving generations of technology and by putting things on chip.

This has an interesting impact that if people understand and anticipate, is very powerful. If they try to resist, it can be a problem.

The thing is that this advantage of putting more and more stuff on the chip means that if you really want to take advantage of the semiconductor technology, what you have to do is put more of the system functions on the chip continually. And this has been kind of a hard thing for the semiconductor industry to convince some of the customers of over of the years. I remember the first semiconductors we made at Fairchild in 1961, were integrated circuits we were actually bringing them to the market, and we went to our customers, we were proud of this new achievement, a complete circuit on a chip. I remember going to one aerospace company with our integrated flip-flop circuit and saying, "Look, we can make a flip-flop for you."

First, our interface at the customer was a circuit design engineer, and going in to a circuit design engineer and saying, "Hey, we can do your circuit design for you" doesn't give you the most favorable response. In fact, the response we got from that one was "We have 16 different flip-flops we need in our system. We have an expert on each one of those." There were dozens of ways our flip-flop was inferior to any of those and it wouldn't fit any of the applications. Why were we wasting our time doing circuit design.

And then my colleague, Bob Noyce, came up with another one of his major contributions to the semiconductor industry. He said, "We'll sell you the complete circuit for less than you can buy the individual components to build your own."

That was the key thing that got them over the hump of, oh, OK, it's cheaper that way. We'll use integrated circuits. And from those very simple circuits it's grown in complexity. We've had to bring more and more and more and more of the stuff onto the chip. And the result is, in technology, it often swallows the customer's added value and gives it back to them free.

The customers that understand that, anticipate it and use it, have been very successful. Those that try to resist it find themselves spending a lot of time and energy and money on things that their competitors don't.

So I view this as the natural direction that technology drives the industry. It's something that you have to accept and try to exploit to move ahead. And it's not really -- the semiconductor manufacturers desire to take all the value added. But, that's nice.

(Laughter.)

DR. GORDON MOORE: It really is the way that we have to move in we're going to exploit the advantages of the technology today and moving forward.

What happens is with a PC board, one month or one year moves on to a chip not much after that. This showing an interface, an Ethernet interface card, moving from some ten chips to a single chip over a time scale like this.

The other natural consequence of this is that the product complexity continues to increase. And here I show product complexity measured by the number of transistors in the circuits, both for DRAMs, which since you don't waste much space laying out a DRAM, tend to be more complex than the microprocessors, and some of the microprocessors. Actually, the last point of the microprocessors is falling a little below the line. That's not because we can't put more on a chip. It's an economic tradeoff as these chips get fairly large.

The technology that drives that is our ability to make things smaller, this violation of Murphy's law, for as long as we've been exploiting this technology, which I date from about the first planar transistor in 1959, which is for some -- that's almost 40 years now, 38 years, we've been on a trend that cuts the minimum feature size in half about every six years.

We actually do a turn of the technology probably twice that often. So over most of this time, the generations of technology have shrunk by the magic 70 percent or to 70 percent of the previous size about once every three years. And as you see, Intel's technology has followed that curve fairly precisely. Some of the early points are missing, but they were pretty much sprinkled on the blue line. And the semiconductor industry road map was put together a few years back for the leading edge technology, again stays on that factor of .7 in minimum features every three years.

As we get smaller in the X/Y directions it's also important that we shrink the thickness of the films. This shows the insulator thickness in the MOS transistors is a function of the minimum size for various levels of technology.

Frankly, this curve surprises me more than the other one does. The other one is pretty impressive getting down to quarter micron technology now, approaching the wavelength of visible light.

This one, on the other hand, has gone much further than I would have anticipated. I remember in the early days figuring that probably a thousand angstroms was as thin as it would ever be able to go with insulating layers. Back of the envelope kind of calculations.

That took a model of atoms plopping in random on a surface, suggested that if you got many fewer atomic layers and down to a thousand angstroms, the likelihood of a pinhole would be high enough that you wouldn't be able to keep the integrity of the film over a very large area.

That completely neglected the fact that chemical forces are actually working for us here rather than against us. It's not a random dropping of atoms on the surface at all but a very careful build up of a film layer by layer. You can go very much thinner than that. The point furthest on the right there that corresponds to something like 30 angstroms is ten molecular layers thick. And even at that level, we have good integrity of the film. So this can continue to go for a while. I hesitated to extrapolate it beyond the right edge of the curve, but certainly the opportunity to continue moving in that direction exists.

The impact of these technological changes, making things smaller so they go faster, putting more stuff on a chip, gets reflected in the performance of the devices. And this is the performance of Intel's microprocessors from the original 4004. And as you see, as near as we can measure this, we had something like a 20,000-fold improvement in computing performance over this time frame. And the slope shows no sign of changing. I think we'll be able to continue this for quite a while by exploiting the capability of this technology when we combine with the advantages that are being made in design.

I don't know quite what this is going to enable in the future, but I have met very few people in your kinds of positions who haven't felt they couldn't take advantage of greater computing power.

Now, a little history to show more graphically, maybe, how some of these things have changed. This is a photomicrograph of the first planar transistor. I like to show this one because I think it's the only product that I ever designed myself that actually went into production.

(Laughter.)

DR. GORDON MOORE: The 764 micron is not a magic number. That's just a translation of 30,000ths of an inch. We used to work in the English system in a previous life. And that technology was extended by Bob Noyce's inventions of isolation interconnection to let us make a complete integrated circuit.

This is the remaining photograph of the very earliest integrated circuits at Fairchild. This was actually a flip-flop. I think one of the ones we were trying to sell to that nameless aerospace company. It's not a very pretty picture because the etching to make the round die kind of caught at least one of the bond pads, and left something that would be pretty hard to make connections to.

The round die was designed to fit within a lead circle in an old transistor can where when you put more than the three leads on. We put actually eight leads on a transistor can, and each one of these little pads would light up adjacent to it on a bond pad so we can make a little blob of conductive epoxy on each one. We didn't think we would make as many as six lead bonds reliably in a single device in those days.

That, of course, is somewhat different than we make today in our modern microprocessors. This is the core processor, the Pentium II processor, some seven and a half million transistors in the chip. Four layers of metal, .35 micron processor. We will move to the quarter micron very shortly. Quite a far cry from that original integrated circuit shown on the previous slide. And a transistor today in cross-section is really, to me, spectacular. The gate electrode shown here, the spacers on the side to reduce some of the capacitances. That black line that goes underneath the thing called gate is where the gate insulator goes, so thin that even at this extremely high resolution under an electron microscope, it doesn't show up more than as just a simple line there.

And this gets extended without much obvious change as we move on to the next generation of technology.

This is a cross-section of a modern technology. You see there are many, many layers there. The thing that impresses me is how flat and neat each of those layers is because of a new technology adopted a few years ago that let's us planarize the surface after each thin film operation, a process that to me is completely counter intuitive. We actually go in there, take the top of the wafer and polish the thing, put it on a big wheel and spin it with some chemicals and abrasives, call it chemical mechanical polish. And this has to be uniform to a small fraction of a micron over the entire wafer surface. We're talking optical quality polishing here. And we go through that operation many, many times as we polish the insulators, the metals, the tungsten plugs which are those more brightly colored structures.

This is a five-layer metal technology. Actually these are quarter micron technology. But maybe you get a better picture of this if we look at it more closely. So I have a couple of our engineers at our Santa Clara facility sitting next to their focus ion beam microscope, and with a little bit of luck we'll be able to look at something like this in real time. So let me move over here and see if I can scare up Tom and Kelly in Santa Clara.

Hi. How are you guys doing?

(Laughter.)

DR. GORDON MOORE: Hi. How are things going?

TOM: Hi. Just fine.

DR. GORDON MOORE: OK. This is a ProShare® video conferencing system hookup we have here. Why don't you tell us what you're going to show us.

TOM: OK. I'm holding a 233 MHz Pentium processor wafer in my hand, and today we're going to demonstrate how we actually do a cross-section into a device on one of these Pentium processors.

DR. GORDON MOORE: How did they ever let you get a whole wafer out of the fab?

TOM: You have to have the right connections.

(Laughter.)

DR. GORDON MOORE: OK. You've got one under the microscope there?

TOM: Yeah. What we're going to do now is we have previously lowered one of these wafers into the microscope chamber, and we are going to switch to an optical microscope which is actually showing the wafer inside the chamber.

DR. GORDON MOORE: Oh, yeah, I can see it. This is the thing holding the wafer, and I can see some of the dies on here. It's a little hard to interpret, but I've got a pretty good idea what I'm looking at. Zoom in there a bit. I think I can see the serial number on the wafer, even. Yeah, there it is.

TOM: Yeah, that's right. That's the lot number for the wafer, and you can see the borders of the Pentium processor.

DR. GORDON MOORE: Yeah, I see the scribe lines there between the various processor chips.

TOM: OK. Now we are going to go from this notch or lot number orientation at the edge of the wafer over to a die corner, and this wafer, once again, has 265 Pentium processors on it.

DR. GORDON MOORE: That's a lot of computing power.

(Laughter.)

TOM: It is.

DR. GORDON MOORE: OK. I see we're at the intersection of four die here now showing up on the light microscope.

TOM: OK. I'll zoom up on that a little bit. Now what we are going to do is switch from this optical image over to the fixed image.

DR. GORDON MOORE: It's hard to see with the optical image.

TOM: This is it.

TOM: The FIB image allows us to go to resolutions which are actually below the wavelength of light.

DR. GORDON MOORE: Good. I see some hieroglyphics here in the middle of the cross what are those.

TOM: These are letters B, E, C, and D which are used to define the edge of the reticle field. These are used for alignment in photography.

DR. GORDON MOORE: Fine. And these are the scribe lines that make the cross, I guess.

TOM: They are. And the scribe line is about 120 microns line and the saws that actually end up dicing the wafer goes through these scribe lines.

DR. GORDON MOORE: So 120 microns is a fat hair, typical hair is about 100 microns. Those of you with coarse hair, your hair is about the size of that line there.

TOM: From here we are going to navigate over to a bond pad.

DR. GORDON MOORE: OK. I see the bond pads coming up on two different die here with the scribe line with some bright spots in the middle of it.

TOM: Yeah, these bond pads actually are about 80 microns wide and they are used to interface the die to the package.

DR. GORDON MOORE: OK. Those are a thin hair, then.

TOM: That's right. From here, we are going to go to a specific transistor. This Pentium processor has over five million transistors on it, and it's actually quite a major accomplishment for us to be able to get to the specific transistor. We typically use pad navigation. For this demonstration, we have accelerated a few of these methodologies, and we're just going to go right to the transistor now, Kelly.

DR. GORDON MOORE: OK. Now I see a bunch of horizontal lines with a spot in the middle. What am I looking at?

TOM: We're actually in the cache region of the chip, and this happens to be the data cache and these lines on the surface are for the cache and VCC power supply.

DR. GORDON MOORE: These are aluminum stripes, then, that conduct the current there. And what's the spot I'm looking at.

TOM: The spot is actually the box that we have previously built, and the transistor of interest is in the spot.

DR. GORDON MOORE: What do you mean by milled?

TOM: In the FIB, which stands for focus ion beam, we have a high energy beam that actually sputters atoms from the surface of the sample. The beam is also rastered so thus you get the box shape. So, you mill down into the sample to run a cross-section.

DR. GORDON MOORE: OK. Can we look closer at this?

TOM: Yes. Kelly can tilt the sample first. Actually, now the entire wafer is being tilted. This will allow us to look end-on into the box.

Now Kelly is going to slowly zoom up so we can look inside the box, going right inside.

(Laughter.)

DR. GORDON MOORE: How big is this box?

TOM: This box is about 10 by 10 microns.

DR. GORDON MOORE: OK. Oh, boy. This is a little one, less than a half a thousandth of an inch. Yeah, I can see the hole now, the bottom lip, and I guess that's the back wall up there.

TOM: Yeah.

DR. GORDON MOORE: All right. I'm starting to see some structure. I guess I can see metal 5, 4, 3, keep coming, 2 and 1. I can see all five layers of metal now on the back wafer there. This is a quarter micron technology. Those things are pretty close together. I can see the tungsten plugs also between the layers of aluminum.

TOM: We're going to do a slow scan to get a slightly higher quality image.

DR. GORDON MOORE: OK.

TOM: The contrast in the metal five and metal four are actually different aluminum grains.

DR. GORDON MOORE: OK. That's showing up quite clearly this time. OK, now I can see the bottom three layers of metal developing nicely with the tungsten plugs. Oh, there's the silicon, and you can see the trench isolation. Do you know which transistor you're looking at here in particular in this one?

TOM: We do have addresses, actually, for all of these transistors. These are actually a column address going down into the transistor.

DR. GORDON MOORE: OK. You get in here, dig down under five layers of metal and at least an equivalent number of insulator layers, find a particular transistor and try to evaluate what's wrong with it, I guess. That's pretty spectacular.

TOM: Yeah.

DR. GORDON MOORE: OK. Thank you.

(Laughter.)

(Applause.)

DR. GORDON MOORE: They can even do brain surgery there. If we forget our connection, they can go in and connect it back up if necessary. Not on a production basis, though.

(Laughter.)

DR. GORDON MOORE: Making things flat has changed things a lot. A couple of generations of processes ago, we just started using the polishing. Here you see a structure where the top couple of layers are flat but the things underneath show the contours are built up naturally.

If you try to make a five-layer metal structure without the polishing, it gets such ridiculous topography that the lithography doesn't work anymore; nothing works very well.

There are other challenges we're having to face, also, with these technologies, and these relate to the rate of change that we go through in the industry. We have to ramp up a processor extremely rapidly and then ramp it down at least equally fast.

This shows several generations of the Pentium processor. Remember on that slide where I showed the four dies for the Pentium processor, each one getting smaller as we went through the generations, here the four colors show the four generations. The very first one is the 60 and 66 MHz Pentium processor that came off the .8 micron technology. Never went to very high volume.

The .6 micron technology grew fairly rapidly, building devices up to 120 MHz. The .35 micron generation, the generation that's out there now, was up over 200 MHz, and then the quarter micron generation is going on.

Each one of these requires extensive retooling of the factories, and you see a given technology is only around for a couple of years producing a particular product.

This is a significant challenge to the factories in itself, but when you combine it with the fact that the changes go on within the family, it gets considerably more complex. For example, the yellow here is -- I guess I can call it classic Pentium processor. The Pentium processor with MMX™ technology which has been growing very, very rapidly since its introduction really the beginning of this year, was happening in the last year, has really replaced it completely on this time scale. So you have not only the changes in process generation but the changes in the product occurring at really an accelerated pace. It really keeps our factories busy.

It certainly changed a lot since the early days. This is a picture of Intel's manufacturing in about 1970. That was a time when we felt whatever happened below the level of the bench didn't make much difference on cleanliness, so many smocks were de rigeur in the lab, often with peace symbol embroidered on them and one thing or another.

(Laughter.)

DR. GORDON MOORE: That has changed quite a bit. If we look at the modern day fab, and this is actually the one in Santa Clara, people are essentially completely in space suits. The material moves around either in guided vehicles or on a monorail system from one generation to the other, is all automatically handled. People don't use tweezers and move wafers anymore. And all the equipment, picking the dies and doing the assembly, the degree of automation and cleanliness has really changed dramatically.

We've learned a lot about how to clean things up, which is absolutely necessary in order to be able to make today's products.

We've gone through a couple of different ways to try to improve yields, for example. One thing we did, we used to use the American judicial system for defects. Everything was innocent until proven guilty. We had to find a defect, identify it with a particular cause before we cleaned that up. We had so many things to work on that we could be very selective and only work on those where we knew it would have an impact so we did a lot of analysis before we made the changes in manufacturing.

When the Japanese manufacturers got into this business heavily in the '80s, they took exactly the opposite approach. Any deviation from perfection was bad. So without worrying so much about which things were actually causing them problems, they cleaned up all the chemicals, cleaned up the environmental, cleaned up the piping to move the gas around, did everything on a broad scale. I liken these to the difference between targeted bomb accompanying carpet bombing for getting rid of defects.

Now I think we both moved -- certainly we have moved to a combination of the two. We clean up everything as well as we can; in addition, use techniques like this focused ion beam microscope and milling to find the residual defects, relate those to the particular parts of the process where they're introduced and go back and work especially hard on them. Defects have gotten down to such a low level now, finding out what they are and where they come from is increasingly challenging. The analytical tools required are a real alphabet soup. It's really been an amazing additional capability necessary to help us clean things up.

Wafers have changed in size during this time period, too. The first planar transistor I showed you was made on about a half-inch wafer. These wafers are shown really to scale. In fact, one of my first technical contributions in the semiconductor industry was to prove if you went above three-quarters of an inch diameter wafer, the materials went {} and materials were imperfect. Things have changed quite a bit since then and I admit having been skeptical about a lot of changes in wafer size. These are expensive and difficult to do, and it's not always obvious that you're going to get the benefits that the larger area gives.

But now the industry is very heavily in eight-inch wafers, and 12-inch wafers or more correctly 300 millimeter wafers look like they'll be here about the end of the decade. For some very good reasons. And we'll talk about those in a second.

But looking forward, we still have a lot of challenges and a lot of headroom with the technology. I've listed here some of the challenges that I think we have to contend with. Managing complexity is of extreme importance. Design of a modern microprocessor, at least at Intel, typically takes place at several locations separated quite widely geographically. We can no longer get all the engineers to work on a project at one place, connected with an extensive computer network and a lot of tools.

Managing that, to be sure that the product that comes out the end is what we started to do takes a lot of attention and sophistication. Similarly, being sure what you design is what you wanted to make, functional validation, is a big job. In fact, we have about as many people doing that as we did the actual design on a new processor. And even then, occasionally something slips through, like some of you may remember the Pentium processor floating point problem of a couple of Christmases ago. So something like that, however, does allow us to improve our validation techniques rather considerably.

The rest of these I want to talk about a little bit more in detail. Interconnections are starting to be a limiter, power which I thought at one time would solve the CMOS is rearing its ugly head, cost is always a consideration. The basic technology that let's us make things smaller, the lithography, requires a good deal of the state of improved we've been on. {}

Let's look first at the he delay trends. Up until now, the delays have been principally determined by the transistors. The interconnection has tended to be slower. I know we've taken kind of an average of interconnects of a couple millimeters long. They continue to get faster as we go to smaller connections, but the delays, because of the increased resistance in capacitance associated with the interconnectors, starts to slow down.

Right now, moving from .35 micron to .25 micron, at least with the example I've chosen, we go from the point where the transistor delay dominates to the point where the interconnection delay dominates. And as we look further down the road, increasingly, interconnections are going to be dominating the performance.

This requires that we look at things to decrease the resistance and the capacitance insofar as we can. You've seen copper mentioned rather extensively in the newspapers recently as a substitute for aluminum interconnections. Copper is a little bit better as a conductor. It has 50 percent higher conductivity if you can get the bulk properties on top of it but it's not factor of two orders of magnitude.

Similarly, we have demonstrated insulators that have a diametric constant of .02. They're mostly air, kind of a gel structure. You can make those in bulk. It's not clear yet we can put them on devices. Some organic films are a little lower, but we'll be fighting conductivity and dielectric constants very strongly over the next few years.

Moving on to power. I have here a simple example of power scaling. I want to consider two microprocessors made on different generations of technology. And this would be on two different generations. Skip one. The sort of six-year apart, nominally. Consider it would be the .35 micron technology and the .18 micron technology for example. And see what happens to the power of the device as we move from one of those to the other.

First of all, we would improve the frequency significantly. I picked a factor of five here. Maybe from 200 MHz to a gigahertz. That's the kind of thing you'd be looking at moving from .35 to .15. The scaling factor going through two generations, .7 squared is about .5; .49, I guess to be more precise.

And as we saw in the early slide when I showed the various families of microprocessors, as we move down to the lead processor on each generation, it tends to be bigger than the chip was previously. So I'm saying over two generations of technology like this, the leading processor might double the area.

So then we can look at what happens with the power. The power is the frequency, proportional to the capacitance which is one over the scaling factor squared in capacitance per unit area times the area times V squared. Or if you looked at these two processors, then, the power of the new one over the power of the original one, and just plugged in the numbers, {} you see for the same voltage, you would have 40 times the power. The ten watt processor on the .35 micron generation of technology would be a 400 watt processor on the new generation if nothing else was changed.

Getting 10 watts out of a package is fun enough. Trying to get 400 watts out of one is something we don't know much at all.

Obviously the one variable we have control over there is the voltage. So if we scaled the voltage in order to maintain the power the same in these two generations it turns out to be by the square root of 40 or 3.3 volt processors today would have to be the half volt processor a couple generations down the road.

Operating at half a volt isn't much fun either. Trying to maintain a few percent accuracy in your power distribution when you're moving subsequent amps or so around is really a challenge. So power is something we're going to have to spend a lot of time and energy on over the next several generations, and we're going to keep on the curve we've been on and still allow the products to be used easily in systems.

I said cost is important. This has become a very capital intensive industry. This is a change. When Intel was founded, on the first $3 million we set up our development and our manufacturing facilities, all the equipment in them, developed our first products and processes. Now $3 million doesn't buy you a single tool that goes into the fab.

Over the last few years in particular, the cost has gone up by leaps and bounds. I remember anticipating a billion dollar fab and thinking that was something we could never afford, but if you look at these curves here, this is a capital cost for 5,000 wafer starts per week. We consider this a very small facility, and typically we'd build one twice that large.

So if you look at the quarter micron technology, you see it's about 1.2, 1.3 billion dollars per 5,000 wafers. If you wanted 10,000 wafer factory, you're between two and two and a half billion dollars in capital investment.

As we move to the next generation of technology, it moves up a fair amount from .25 to .18 because controlling the smaller dimensions require exactness of state of the art. But at the same time, if we move to 300 millimeter wafers, a very likely thing to happen, we get up to something like $2 billion for 5,000 wafers per week. Or if we still want 10,000 wafer facilities, our plants get up in the $4 billion range.

Amazing to me, the industry has been able to swallow these huge increases in capital. We can get considerably more output as we move from one to the other also, so all is not completely wasted, certainly. But it is an increasing challenge as we move up the curve.

I mentioned lithography is a challenge. If we want to stay on this road map, continuing with smaller and smaller dimensions, requires a tremendous amount of work because now we're in a range that's below the optical wavelength, and increasingly is below the wavelength of the ultraviolet light we can get as well.

We can make laboratory samples of very small features. This shows .15 micron lines with .15 micron spaces in what we used to call a thin film, even though the film is several times as thick as the features we're putting in it. But the tools don't exist to do this over a large area or on a production basis yet. We think they will come along by the time we need them, which is for the generation beyond .18 microns.

In fact, if we look at lithography alternatives, we've been able to use ultraviolet light down to the .25 generation in production. By pushing the techniques as hard as we can, actually writing features that are smaller than wavelength, we should be able to push to the .18 microns and moving into production in a couple of years. Below that, life gets a lot more difficult, and that's where we're looking at really the industry, looking at x-rays, some special E-beam writing techniques, each of which is making structures using a very short wavelength but which have a variety of other problems. Or IE investment for extreme ultraviolet which lets you use mirrors, multiple layer dielectric mirrors. {} Maybe we can extend a lot of ideas of optical lithography for a couple more generations.

Any one of these three technologies, if it can work potentially has the ability to take us down really about as far as we want to go.

We've gone as far as we want to go but maybe not as far as nature will let us go because there are real limits. This is an electron micrograph through one of the quarter micron transistors. The bottom here is the single crystal silicon, and if this picture shows up well, should be able to see the individual molecules, which shows up nicely in the original. We tend to lose a little bit of resolution here.

The top layer is the polycrystalline silicon which makes up the gate. The gray area in the middle here is the gate dielectric.

As you can see, it's only several molecular layers thick. I don't know how much more you can expect to scale that without beginning to see some real problem. So at some time in the next several generations, we really start to get to some fundamental limits. But not before we've gone through probably five more generations of technology.

This will carry us quite a long way, and it will have some very important impacts on what we can do with microprocessors. We can expect to see the performance of our processors double every 18 to 24 months for at least several years.

If you extrapolate all those curves together, I think Jerry Parker, who runs our technology and manufacturing operation, says we run out of gas doing that in the year 2017. That's well beyond my shift.

(Laughter.)

DR. GORDON MOORE: We can expect to see product life cycles continue to be short and probably even get shorter. And as I indicated, we can expect to take advantage of this integration by more and more functionality moving onto the chip. Because that's the only way we can take full advantage of the hardware technology which has taken us so far in reducing the cost and improving the performance of electronic systems.

So I think understanding where the technology naturally drives us is extremely important, and being sure, collectively, we take the most advantage of it will let us move the electronics industry along the fastest.

This Developer's Forum is really the mechanism we want to use to keep you abreast of where we think the technology is going, and, hopefully, make it as useful as possible so that you can take advantage of what this violation of Murphy's Law has allowed us to do.

So I hope you find this one rewarding and we'll be able to see you subsequently in the series we plan. Thank you.

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